This disclosure generally relates to the field of computer systems, and, more particularly, to the testing of electrical devices.
A Peripheral Component Interconnect Express (“PCIe”) device initializes a link for data transfer/communication with another device using a PCIe link training process. During link training, devices exchange sequences to determine link parameters such as lane polarity, link width, and link speed. Link width corresponds to a number of lanes in the link. Each lane is a full duplex channel that includes a transmit pair of wires and a receive pair of wires. Each pair of wires is comprised of a positive wire and a negative wire for differential signaling. The link initialization process configures a PCIe device's hardware (e.g., control registers) that implements the PCIe physical layer. The configuration includes configuring a Link Training and Status State Machine (“LTSSM”), which guides the link initialization. An LTSSM consists of a number of states including the “detect,” “polling,” and “configuration” states. If an LTSSM successfully negotiates the states, the LTSSM is put into the “L0” state, which is the normal, fully active state during which a PCIe device may transmit and receive data packets. An LTSSM includes additional states such as the “recovery” state, which is entered from the L0 state when an error that renders a link inoperable occurs.